Floorplanning and Assigning Placement Constraints with PlanAhead Software
When targeting FPGAs, you can use the PlanAhead™ software
to enter placement constraints that control I/O pin and logic assignments,
global logic placement, and area group assignment. The PlanAhead software
provides a comprehensive environment for analyzing the design for
connectivity, density, and timing. After analyzing the design, you
can apply placement constraints to help drive the implementation tools
toward improved results. These constraints may include location constraints
to lock specific logic objects into specific sites on the device or
area constraints to constrain a group of logic within a specific area
of the device.
Note When you invoke the PlanAhead software from Project Navigator,
a simplified version of the software is launched. The standalone version
of the PlanAhead software has additional features. For more information
on the PlanAhead software, see the PlanAhead User Guide. For more information on constraints, see the "Constraint
Types" chapter of the Constraints Guide.
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